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PIC16HV540
Enhanced PIC16C54 EPROM-Based 8-Bit CMOS Microcontroller With On-Chip Voltage Regulator
High-Performance RISC CPU:
Device Pins I/O EPROM RAM PIC16HV540 18 12 512 25 * Only 33 single word instructions to learn * All instructions are single cycle (200 ns) except for program branches which are two-cycle * Operating speed: DC - 20 MHz clock input DC - 200 ns instruction cycle * 12-bit wide instructions * 8-bit wide data path * Seven special function hardware registers B * Four-level deep hardware stack * Direct, indirect and relative addressing modes for data and instructions
Pin Configurations
PDIP, SOIC, Windowed CERDIP
RA2 RA3 T0CKI MCLR/VPP VSS RB0 RB1 RB2 RB3 *1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 RA1 RA0 OSC1/CLKIN OSC2/CLKOUT VDD RB7 RB6 RB5 RB4
PIC16HV540
SSOP
RA2 RA3 T0CKI MCLR/VPP VSS VSS RB0 RB1 RB2 RB3 *1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 RA1 RA0 OSC1/CLKIN OSC2/CLKOUT VDD VDD RB7 RB6 RB5 RB4
PIC16HV540
Peripheral Features:
* 8-bit real time clock/counter (TMR0) with 8-bit programmable prescaler * Power-On Reset (POR) * Brown-Out Protection * Device Reset Timer (DRT) with short RC-oscillator start up time * Programmable Watchdog Timer (WDT) with its own on-chip RC oscillator for reliable operation * Sleep Timer * 8 High Voltage I/O * 4 Regulated I/O * Wake up from SLEEP on pin change * Programmable code-protection * Power saving SLEEP mode * Selectable oscillator options: - RC: Low-cost RC oscillator - XT: Standard crystal/resonator - HS: High speed crystal/resonator - LP: Power saving, low frequency crystal * Glitch filtering on MCLR and pin change inputs
B
B
CMOS Technology: B * Selectable on-chip 3V/5V Regulator
* Low-power, high-speed CMOS EPROM technology * Fully static design * Wide-operating voltage range: - 3.5V to 15V * Temperature range: - Commercial: 0C to 70C - Industrial: -40C to 85C * Low-power consumption - < 2 mA typical @ 5V, 4 MHz - 15 A typical @ 3V, 32 kHz - < 4.5 A typical standby current @ 15V (with WDT disabled), 0C to 70C
B B B
B
B = Enhanced Features
(c) 1998 Microchip Technology Inc.
Preliminary
DS40197A-page 1
PIC16HV540
1.0 GENERAL DESCRIPTION
1.2
1.2.1
Enhanced Features
REGULATED I/O PORTA INDEPENDENT OF CORE REGULATOR
The PIC16HV540 from Microchip Technology is a low-cost, high-performance, 8-bit, fully-static, EPROM-based CMOS microcontroller. It is pin and software compatible with the PIC16C5X family of devices. It employs a RISC architecture with only 33 single word/single cycle instructions. All instructions are single cycle except for program branches which take two cycles. The PIC16HV540 delivers performance an order of magnitude higher than its competitors in the same price category. The 12-bit wide instructions are highly orthogonal resulting in 2:1 code compression over other 8-bit microcontrollers in its class. The easy-to-use and easy-to-remember instruction set reduces development time significantly. The PIC16HV540 is the first One-Time-Programmable (OTP) microcontroller with an on-chip 3 Volt and 5 Volt regulator. This eliminates the need for an external regulator in many applications powered from 9 Volt or 12 Volt batteries or unregulated 6 Volt, 9 Volt or 12 Volt mains adapters. The PIC16HV540 is ideally suited for applications that require very low standby current at high voltages. These typically require expensive low current regulators. The PIC16HV540 is equipped with special features that reduce system cost and power requirements. The Power-On Reset (POR) and Device Reset Timer (DRT) eliminate the need for external reset circuitry. There are four oscillator configurations to choose from, including the power-saving LP (Low Power) oscillator, cost saving RC oscillator, and XT and HS for crystal oscillators. Power saving SLEEP mode, Watchdog Timer and code protection features improve system cost, power and reliability. The UV erasable CERDIP packaged versions are ideal for code development, while the cost-effective OTP versions are suitable for production in any volume. The customer can take full advantage of Microchip's price leadership in OTP microcontrollers while benefiting from the OTP's flexibility. The PIC16HV540 will in future be supported by a full-featured macro assembler, a software simulator, an in-circuit emulator, a `C' compiler, fuzzy logic support tools, a low-cost development programmer, and a full featured programmer. All the tools are supported on IBM(R) PC and compatible machines. Functions that correspond to the PIC16C54 (such as assembly and programming) can utilize existing tools.
PORTA I/O pads and OSC2 output are powered by the regulated internal voltage VIO. A maximum of 10mA per output is allowed, or a total of 40mA. The core itself is powered from the independently regulated supply VREG. 1.2.2 HIGH VOLTAGE I/O PORTB
All eight PORTB I/Os are high voltage I/O. The inputs will tolerate input voltages as high as the VDD and outputs will swing from VSS to the VDD. The input threshold voltages vary with supply voltage. (See DC characteristics.) 1.2.3 WAKE UP ON PIN CHANGE ON PORTB [0:3]
Four of the PORTB inputs latch the status of the pin at the onset of sleep mode. A level change on the inputs resets the device, implementing wake up on pin change (via warm reset). The PC bit in the status register is reset to indicate that a pin change caused the reset condition. Any pin change (glitch insensitive) of the opposite level of the initial value wakes up the device. This option can be enabled/disabled in OPTION2 register. (See OPTION2 register, Figure 4-3.) 1.2.4 WAKE UP ON PIN CHANGE WITH A SLOWLY-RISING VOLTAGE ON PORTB [7]
PORTB [7] also implements wake up from sleep, however this input is specifically adapted so that a slowly rising voltage does not cause excessive power consumption. This input can be used with external RC circuits for long sleep periods without using the internal timer and prescaler. This option is also enabled/disabled in OPTION2 register. (The enable/disable bit is shared with the other 4 wake up inputs.) The new wake up status bit in the status register is also shared with the other four wake up inputs. 1.2.5 LOW-VOLTAGE (BROWN-OUT) DETECTION
1.1
Applications
The PIC16HV540 fits perfectly in low-power battery applications such as CO and smoke detection, toys, games, security systems and automobile modules. The EPROM technology makes customizing of application programs (transmitter codes, receiver frequencies, etc.) extremely fast and convenient. The small footprint package, for through hole or surface mounting, make this microcontroller perfect for applications with space limitations. Low-cost, low-power, high-performance, ease of use and I/O flexibility make the PIC16HV540 very versatile even in areas where no microcontroller use has been considered before (e.g., timer functions, replacement of "glue" logic in larger systems, coprocessor applications).
DS40197A-page 2
A low voltage (Brown-out) detect circuit optionally resets the device at a voltage level higher than that at which Brown-out events occur. The nominal trip voltages are 3.1 Volt (for 5 Volt operation) and 2.2 Volt (for 3 Volt operation), respectively. The core remains in the reset state as long as this condition holds (as if a MCLR external reset was given). The Brown-out trip level is user selectable, with built-in interlocks. The Brown-out detector is disabled at power-up and is activated by clearing the appropriate bit (BE) in OPTION2 register. 1.2.6 INCREASED STACK DEPTH
The stack depth is 4 levels to allow modular program implementation by using functions and subroutines.
Preliminary
(c) 1998 Microchip Technology Inc.
PIC16HV540
1.2.7 ENHANCED WATCHDOG TIMER (WDT) OPERATION
2.0
PIC16HV540 DEVICE VARIETIES
The WDT is enabled by setting FUSE 2 in the configuration word. The WDT setting is latched and the fuse disabled during SLEEP mode to reduce current consumption. If the WDT is disabled by FUSE 2, it can be enabled/disabled under program control using bit 4 in OPTION2 (SWE). The software WDT control is disabled at power-up. The current consumption of the on-chip oscillator (used for the watchdog, oscillator startup timer and sleep timer) is less than 1A (typical) at 3 Volt operation. 1.2.8 REDUCED EXTERNAL RC OSCILLATOR STARTUP TIME
A variety of frequency ranges and packaging options are available. When placing orders, please use the PIC16HV540 Product Identification System at the back of this data sheet to specify the correct part number.
2.1
UV Erasable Devices
The UV erasable versions, offered in CERDIP packages, are optimal for prototype development and pilot programs. UV erasable devices can be programmed for any of the four oscillator configurations. Microchip's PICSTART(R) and PRO MATE(R) programmers both support programming of the PIC16HV540. Third party programmers also are available; refer to Literature Number DS00104 for a list of sources.
If the RC oscillator option is selected in the Configuration word (FOSC1=1 and FOSCO=1) the oscillator startup time is 1.0 ms nominal instead of 18 ms nominal. This is applicable after power-up (POR), either WDT interrupt or wake-up, external reset on MCLR, WPC (wake on pin change) and Brown-out. 1.2.9 LOW-VOLTAGE OPERATION OF THE ENTIRE CPU DURING SLEEP
2.2
One-Time-Programmable (OTP) Devices
The voltage regulator can automatically lower the voltage to the core from 5 Volt to 3 Volt during sleep, resulting in reduced current consumption. This is an option bit in OPTION2 register. 1.2.10 GLITCH FILTERS ON WAKEUP PINS AND MCLR
The availability of OTP devices is especially useful for customers expecting frequent code changes and updates. The OTP devices, packaged in plastic packages, permit the user to program them once. In addition to the program memory, the configuration bits must be programmed.
Glitch sensitive inputs for wakeup on pin change are filtered to reduce susceptibility to interference. A similar filter reduces false reset on MCLR. 1.2.11 PROGRAMMABLE CLOCK GENERATOR
2.3
Quick-Turnaround-Production (QTP) Devices
When used in RC mode the CLKOUT pin can be used as a programmable clock output. The output is connected to TMR0, bit 0 and by setting the prescaler, clock out frequencies of CLKIN/8 to CLKIN/1024 can be generated. The CLKOUT pin can also be used as a general purpose output by modifying to TMR0, bit 0.
Microchip offers a QTP Programming Service for factory production orders. This service is made available for users who choose not to program a medium to high quantity of units and whose code patterns have stabilized. The devices are identical to the OTP devices but with all EPROM locations and configuration bit options already programmed by the factory. Certain code and prototype verification procedures apply before production shipments are available. Please contact your Microchip Technology sales office for more details.
TABLE 1-1:
Clock Memory Peripherals Packages
PIC16HV540 DEVICE
PIC16HV540
Maximum Frequency (MHz) EPROM Program Memory RAM Data Memory (bytes) Timer Module(s) I/O Pins Voltage Range (Volts) Number of Instructions Packages 20 512 25 TMR0 12 3.5V-15V 33 18-pin DIP SOIC 20-pin SSOP
2.4
Serialized Quick-Turnaround-Production (SQTP) Devices
Microchip offers the unique programming service where a few user-defined locations in each device are programmed with different serial numbers. The serial numbers may be random, pseudo-random or sequential. Serial programming allows each device to have a unique number which can serve as an entry code, password or ID number.
All PICmicro(R) devices have Power-on Reset, selectable WDT, selectable code protect and high I/O current capability.
(c) 1998 Microchip Technology Inc.
Preliminary
DS40197A-page 3
PIC16HV540
3.0 ARCHITECTURAL OVERVIEW
This section provides information on the architecture of the PIC16HV540. For information on operation of the peripherals, electrical specifications, etc., please refer to the PIC16C5X data sheet (DS30453).
FIGURE 3-1:
PIC16HV540 BLOCK DIAGRAM
VDD
3V/5V Regulator VREG RB7 4 RB3 : RB0 FILTER PC
(PIN CHANGE)
BOD WPC 9-11 BL/BE
RL/SL SWE (OPTION2 REGISTER) T0CKI PIN CONFIGURATION WORD "DISABLE" WATCHDOG OSC1 OSC2 MCLR
9-11 EPROM 512 X 12 12 INSTRUCTION REGISTER 9 12 INSTRUCTION DECODER DIRECT ADDRESS PC
STACK 1 STACK 2 STACK 3 STACK 4
"OSC SELECT" 2 OSCILLATOR/ TIMING & CONTROL
"CODE PROTECT" CLKOUT
WDT TIME OUT 8
WDT/TMR0 PRESCALER
"SLEEP" 6 OPTION2 6 OPTION FROM W 5 5-7 "OPTION" GENERAL PURPOSE REGISTER FILE (SRAM) 25 Bytes
"TRIS 7" DIRECT RAM ADDRESS
FROM W
8 LITERALS STATUS
TMR0 DATA BUS ALU FROM W 4 "TRIS 5" TRISA PORTA 4 4 "TRIS 6" 8 FROM W 8 TRISB 8 PORT 8
FSR 8
W
3V/5V Regulator
VIO
RA3:RA0
HIGH VOLTAGE TRANSLATION
8 RB7:RB0
DS40197A-page 4
Preliminary
(c) 1998 Microchip Technology Inc.
PIC16HV540
TABLE 3-1:
Name RA0 RA1 RA2 RA3 RB0 RB1 RB2 RB3 RB4 RB5 RB6 RB7 T0CKI MCLR/VPP
PINOUT DESCRIPTION - PIC16HV540
DIP, SOIC SSOP I/O/P Input No. No. Type Levels 17 18 1 2 6 7 8 9 10 11 12 13 3 4 19 20 1 2 7 8 9 10 11 12 13 14 3 4 I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I I TTL TTL TTL TTL TTL TTL TTL TTL TTL TTL TTL TTL ST ST Description Independently regulated Bi-directional I/O port -- VIO
High-voltage Bi-directional I/O port. Sourced from VDD.
Wake up on pin change.
OSC1/CLKIN OSC2/CLKOUT
16 15
18 17
I O
ST --
VDD 14 15,16 P -- VSS 5 5,6 P -- Legend: I = input, O = output, I/O = input/output, P = power, -- = Not Used, TTL = TTL input, ST = Schmitt Trigger input
Wake up on SLOW rising pin change. Clock input to Timer 0. Must be tied to VSS or VDD, if not in use, to reduce current consumption. Master clear (reset) input/programming voltage input. This pin is an active low reset to the device. Voltage on the MCLR/VPP pin must not exceed VDD to avoid unintended entering of programming mode. Oscillator crystal input/external clock source input. Oscillator crystal output. Connects to crystal or resonator in crystal oscillator mode. In RC mode, OSC2 pin outputs CLKOUT which has 1/4 the frequency of OSC1, and denotes the instruction cycle rate. Positive supply. Ground reference.
(c) 1998 Microchip Technology Inc.
Preliminary
DS40197A-page 5
PIC16HV540
4.0 MEMORY ORGANIZATION
PIC16HV540 PROGRAM MEMORY MAP AND STACK
PC<8:0> CALL, RETLW Stack Level 1 Stack Level 2 Stack Level 3 Stack Level 4
000h
FIGURE 4-2:
File Address 00h
FIGURE 4-1:
PIC16HV540 REGISTER FILE MAP
INDF(1) TMR0 PCL STATUS FSR PORTA PORTB TRISA TRISB OPTION2
9
01h 02h 03h 04h 05h
User Memory Space
06h 07h
On-chip Program Memory
0FFh 100h
08h 0Fh 10h General Purpose Registers
Reset Vector
1FFh
1Fh
Note 1: Not a physical register.
TABLE 4-1:
SPECIAL FUNCTION REGISTER SUMMARY
Value on Power-On Reset 1111 1111 --11 1111 xx11 1111 Value on MCLR and WDT Reset 1111 1111 --11 1111 xx11 1111
Address N/A N/A N/A 00h 01h 02h(1) 03h 04h 05h 06h
Name TRIS OPTION OPTION2 INDF TMR0 PCL STATUS FSR PORTA PORTB
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
I/O control registers (TRISA, TRISB) Contains control bits to configure Timer0 and Timer0/WDT prescaler Contains control bits to configure pin changes, software enabled WDT, regulation and brown-out Uses contents of FSR to address data memory (not a physical register) 8-bit real-time clock/counter Low order 8 bits of PC PCF PA1 PA0 TO PD Z DC C
xxxx xxxx xxxx xxxx 1111 1111 1001 1xxx 1xxx xxxx
uuuu uuuu uuuu uuuu 1111 1111 100q quuu 1uuu uuuu ---- uuuu uuuu uuuu
Indirect data memory address pointer -- RB7 -- RB6 -- RB5 -- RB4 RA3 RB3 RA2 RB2 RA1 RB1 RA0 RB0
---- xxxx xxxx xxxx
Legend: Shaded boxes = unimplemented or unused, - = unimplemented, read as '0' (if applicable) x = unknown, u = unchanged, q = value depends on condition. Note 1: The upper byte of the Program Counter is not directly accessible. See Section 4.5 of the PIC16C5X data sheet (DS30453) for an explanation of how to access these bits. 2: File address 07h is a general purpose register on the PIC16HV540.
3: PCF This bit is set to 1 after power up-reset (POR) or sleep command. 4: PCF This bit is set to 0 after a wake up on pin change event.
DS40197A-page 6
Preliminary
(c) 1998 Microchip Technology Inc.
PIC16HV540
Figure 4-3:
U-0 bit7
OPTION2 REGISTER (TRIS 07h)
U-0 6 W-1 WPC 5 W-1 SWE 4 W-1 RL 3 W-1 SL 2 W-1 BL 1 W-1 BE 0
W = Writable bit U = Unimplemented bit -n = Value at POR reset
bit 7-6: Unimplemented. bit 5: WPC: Wake up on pin change 1 = Disabled 0 = Enabled SWE: Software WDT enable 1 = Disabled 0 = Enabled RL: Regulated voltage level select bit 1 = 5 Volt 0 = 3 Volt SL: Sleep voltage level select bit 1 = RL bit setting 0 = 3 Volt BL: Brown-out voltage level select bit 1 = RL bit setting, but SL during sleep 0 = 3 Volt BE: Brown-out enabled 1 = Disabled 0 = Enabled
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
(c) 1998 Microchip Technology Inc.
Preliminary
DS40197A-page 7
PIC16HV540
5.0 INSTRUCTION SET SUMMARY
Each PIC16HV540 instruction is a 12-bit word divided into an OPCODE, which specifies the instruction type, and one or more operands which further specify the operation of the instruction. The PIC16HV540 instruction set summary in Table 5-2 groups the instructions into byte-oriented, bit-oriented, and literal and control operations. Table 5-1 shows the opcode field descriptions. For byte-oriented instructions, 'f' represents a file register designator and 'd' represents a destination designator. The file register designator is used to specify which one of the 32 file registers is to be used by the instruction. The destination designator specifies where the result of the operation is to be placed. If 'd' is '0', the result is placed in the W register. If 'd' is '1', the result is placed in the file register specified in the instruction. For bit-oriented instructions, 'b' represents a bit field designator which selects the number of the bit affected by the operation, while 'f' represents the number of the file in which the bit is located. For literal and control operations, 'k' represents an 8 or 9-bit constant or literal value. All instructions are executed within one single instruction cycle, unless a conditional test is true or the program counter is changed as a result of an instruction. In this case, the execution takes two instruction cycles. One instruction cycle consists of four oscillator periods. Thus, for an oscillator frequency of 4 MHz, the normal instruction execution time is 1 s. If a conditional test is true or the program counter is changed as a result of an instruction, the instruction execution time is 2 s. Figure 5-1 shows the three general formats that the instructions can have. All examples in the figure use the following format to represent a hexadecimal number: 0xhhh where 'h' signifies a hexadecimal digit.
FIGURE 5-1:
GENERAL FORMAT FOR INSTRUCTIONS
6 5 d 4 f (FILE #) 0
Byte-oriented file register operations 11 OPCODE
TABLE 5-1:
Field
f W b k x
OPCODE FIELD DESCRIPTIONS
Description
d = 0 for destination W d = 1 for destination f f = 5-bit file register address Bit-oriented file register operations 11 OPCODE 87 54 b (BIT #) f (FILE #) 0
Register file address (0x00 to 0x7F) Working register (accumulator) Bit address within an 8-bit file register Literal field, constant data or label Don't care location (= 0 or 1) The assembler will generate code with x = 0. It is the recommended form of use for compatibility with all Microchip software tools. Destination select; d = 0 (store result in W) d = 1 (store result in file register 'f') Default is d = 1 Label name Top of Stack Program Counter Watchdog Timer Counter Time-Out bit Power-Down bit Destination, either the W register or the specified register file location Options Contents Assigned to Register bit field In the set of User defined term (font is courier)
b = 3-bit bit address f = 5-bit file register address Literal and control operations (except GOTO) 11 OPCODE k = 8-bit immediate value Literal and control operations - GOTO instruction 11 OPCODE k = 9-bit immediate value 9 8 k (literal) 0 8 7 k (literal) 0
d label TOS PC WDT TO PD
dest [] () <>
italics
DS40197A-page 8
Preliminary
(c) 1998 Microchip Technology Inc.
PIC16HV540
TABLE 5-2:
Mnemonic, Operands ADDWF ANDWF CLRF CLRW COMF DECF DECFSZ INCF INCFSZ IORWF MOVF MOVWF NOP RLF RRF SUBWF SWAPF XORWF BCF BSF BTFSC BTFSS ANDLW CALL CLRWDT GOTO IORLW MOVLW OPTION RETLW SLEEP TRIS XORLW f,d f,d f - f, d f, d f, d f, d f, d f, d f, d f - f, d f, d f, d f, d f, d f, b f, b f, b f, b k k k k k k k k - f k
INSTRUCTION SET SUMMARY
12-Bit Opcode Description Add W and f AND W with f Clear f Clear W Complement f Decrement f Decrement f, Skip if 0 Increment f Increment f, Skip if 0 Inclusive OR W with f Move f Move W to f No Operation Rotate left f through Carry Rotate right f through Carry Subtract W from f Swap f Exclusive OR W with f Bit Clear f Bit Set f Bit Test f, Skip if Clear Bit Test f, Skip if Set AND literal with W Call subroutine Clear Watchdog Timer Unconditional branch Inclusive OR Literal with W Move Literal to W Load OPTION register Return, place Literal in W Go into standby mode Load TRIS register Exclusive OR Literal to W Cycles MSb 1 1 1 1 1 1 1(2) 1 1(2) 1 1 1 1 1 1 1 1 1 1 1 1 (2) 1 (2) 1 2 1 2 1 1 1 2 1 1 1 0001 0001 0000 0000 0010 0000 0010 0010 0011 0001 0010 0000 0000 0011 0011 0000 0011 0001 11df 01df 011f 0100 01df 11df 11df 10df 11df 00df 00df 001f 0000 01df 00df 10df 10df 10df LSb ffff ffff ffff 0000 ffff ffff ffff ffff ffff ffff ffff ffff 0000 ffff ffff ffff ffff ffff Status Affected Notes C,DC,Z Z Z Z Z Z None Z None Z Z None None C C C,DC,Z None Z None None None None Z None TO, PD None Z None None None TO, PD None Z 1,2,4 2,4 4
2,4 2,4 2,4 2,4 2,4 2,4 1,4 2,4 2,4 1,2,4 2,4 2,4 2,4 2,4
BIT-ORIENTED FILE REGISTER OPERATIONS 0100 0101 0110 0111 bbbf bbbf bbbf bbbf ffff ffff ffff ffff
LITERAL AND CONTROL OPERATIONS 1110 1001 0000 101k 1101 1100 0000 1000 0000 0000 1111 kkkk kkkk 0000 kkkk kkkk kkkk 0000 kkkk 0000 0000 kkkk kkkk kkkk 0100 kkkk kkkk kkkk 0010 kkkk 0011 0fff kkkk 1
3
Note 1: The 9th bit of the program counter will be forced to a '0' by any instruction that writes to the PC except for GOTO. (See individual device data sheets, Memory Section/Indirect Data Addressing, INDF and FSR Registers) 2: When an I/O register is modified as a function of itself (e.g. MOVF PORTB, 1), the value used will be that value present on the pins themselves. For example, if the data latch is '1' for a pin configured as input and is driven low by an external device, the data will be written back with a '0'. 3: The instruction TRIS f, where f = 5 or 6 causes the contents of the W register to be written to the tristate latches of PORTA or B respectively. A '1' forces the pin to a hi-impedance state and disables the output buffers. 4: If this instruction is executed on the TMR0 register (and, where applicable, d = 1), the prescaler will be cleared (if assigned to TMR0).
(c) 1998 Microchip Technology Inc.
Preliminary
DS40197A-page 9
PIC16HV540
ADDWF Syntax: Operands: Operation: Encoding: Description: Add W and f [ label ] ADDWF 0 f 31 d [0,1] (W) + (f) (dest)
0001 11df ffff
ANDWF f,d Syntax: Operands: Operation: Encoding: Description:
AND W with f [ label ] ANDWF 0 f 31 d [0,1] (W) .AND. (f) (dest)
0001 01df ffff
f,d
Status Affected: C, DC, Z
Add the contents of the W register and register 'f'. If 'd' is 0 the result is stored in the W register. If 'd' is '1' the result is stored back in register 'f'.
Status Affected: Z
The contents of the W register are AND'ed with register 'f'. If 'd' is 0 the result is stored in the W register. If 'd' is '1' the result is stored back in register 'f'.
Words: Cycles: Example:
W = FSR = W = FSR =
1 1
ADDWF 0x17 0xC2 0xD9 0xC2 FSR, 0
Words: Cycles: Example:
W= FSR = W = FSR =
1 1
ANDWF 0x17 0xC2 0x17 0x02 FSR, 1
Before Instruction
Before Instruction
After Instruction
After Instruction
ANDLW Syntax: Operands: Operation: Encoding: Description:
And literal with W [ label ] ANDLW 0 k 255 (W).AND. (k) (W) k
BCF Syntax: Operands: Operation:
Bit Clear f [ label ] BCF 0 f 31 0b7 0 (f)
0100 bbbf ffff
f,b
Status Affected: Z
1110 kkkk kkkk The contents of the W register are AND'ed with the eight-bit literal 'k'. The result is placed in the W register.
Status Affected: None Encoding: Description: Words: Cycles: Example: 1 1
BCF FLAG_REG, 7 Bit 'b' in register 'f' is cleared.
Words: Cycles: Example:
W W = =
1 1
ANDLW 0xA3 0x03 0x5F
Before Instruction
FLAG_REG = 0xC7
Before Instruction After Instruction
After Instruction
FLAG_REG = 0x47
DS40197A-page 10
Preliminary
(c) 1998 Microchip Technology Inc.
PIC16HV540
BSF Syntax: Operands: Operation: Encoding: Description: Words: Cycles: Example: 1 1
BSF FLAG_REG, 7
Bit Set f [ label ] BSF 0 f 31 0b7 1 (f)
0101 bbbf ffff
BTFSS f,b Syntax: Operands: Operation: Encoding: Description:
Bit Test f, Skip if Set [ label ] BTFSS f,b 0 f 31 0b<7 skip if (f) = 1
0111 bbbf ffff
Status Affected: None
Bit 'b' in register 'f' is set.
Status Affected: None
If bit 'b' in register 'f' is '1' then the next instruction is skipped. If bit 'b' is '1', then the next instruction fetched during the current instruction execution, is discarded and an NOP is executed instead, making this a 2 cycle instruction.
Before Instruction
FLAG_REG = 0x0A
Words: Cycles: Example:
1 1(2)
HERE FALSE TRUE * * BTFSS GOTO * FLAG,1 PROCESS_CODE
After Instruction
FLAG_REG = 0x8A
BTFSC Syntax: Operands: Operation: Encoding: Description:
Bit Test f, Skip if Clear [ label ] BTFSC f,b 0 f 31 0b7 skip if (f) = 0 0110
bbbf ffff
Before Instruction
PC = = = = = address (HERE) 0, address (FALSE); 1, address (TRUE)
After Instruction
If FLAG<1> PC if FLAG<1> PC
Status Affected: None
If bit 'b' in register 'f' is 0 then the next instruction is skipped. If bit 'b' is 0 then the next instruction fetched during the current instruction execution is discarded, and an NOP is executed instead, making this a 2 cycle instruction.
Words: Cycles: Example:
1 1(2)
HERE FALSE TRUE BTFSC GOTO
FLAG,1 PROCESS_CODE
* * *
address (HERE) 0, address (TRUE); 1, address(FALSE)
Before Instruction
PC = = = = =
After Instruction
if FLAG<1> PC if FLAG<1> PC
(c) 1998 Microchip Technology Inc.
Preliminary
DS40197A-page 11
PIC16HV540
CALL Syntax: Operands: Operation: Subroutine Call [ label ] CALL k 0 k 255 (PC) + 1 Top of Stack; k PC<7:0>; (STATUS<6:5>) PC<10:9>; 0 PC<8>
1001 kkkk kkkk
CLRW Syntax: Operands: Operation:
Clear W [ label ] CLRW None 00h (W); 1Z
0000 0100 0000
Status Affected: Z Encoding: Description: Words: Cycles: Example:
W W Z = = = The W register is cleared. Zero bit (Z) is set.
Status Affected: None Encoding: Description:
Subroutine call. First, return address (PC+1) is pushed onto the stack. The eight bit immediate address is loaded into PC bits <7:0>. The upper bits PC<10:9> are loaded from STATUS<6:5>, PC<8> is cleared. CALL is a two cycle instruction.
1 1
CLRW 0x5A 0x00 1
Before Instruction After Instruction
Words: Cycles: Example:
PC = PC = TOS =
1 2
HERE CALL THERE
Before Instruction
address (HERE) address (THERE) address (HERE + 1)
CLRWDT Syntax: Operands: Operation:
Clear Watchdog Timer [ label ] CLRWDT None 00h WDT; 0 WDT prescaler (if assigned); 1 TO; 1 PD
0000 0000 0100
After Instruction
CLRF Syntax: Operands: Operation:
Clear f [ label ] CLRF 0 f 31 00h (f); 1Z
0000 011f ffff
f
Status Affected: TO, PD Encoding: Description:
The CLRWDT instruction resets the WDT. It also resets the prescaler, if the prescaler is assigned to the WDT and not Timer0. Status bits TO and PD are set.
Status Affected: Z Encoding: Description: Words: Cycles: Example:
The contents of register 'f' are cleared and the Z bit is set.
Words: Cycles: Example:
1 1
CLRWDT ? 0x00 0 1 1
1 1
CLRF = = = FLAG_REG 0x5A 0x00 1
Before Instruction
WDT counter =
Before Instruction
FLAG_REG
After Instruction
WDT counter WDT prescale TO PD = = = =
After Instruction
FLAG_REG Z
DS40197A-page 12
Preliminary
(c) 1998 Microchip Technology Inc.
PIC16HV540
COMF Syntax: Operands: Operation: Encoding: Description: Complement f [ label ] COMF 0 f 31 d [0,1] (f) (dest)
0010 01df ffff
DECFSZ f,d Syntax: Operands: Operation: Encoding: Description:
Decrement f, Skip if 0 [ label ] DECFSZ f,d 0 f 31 d [0,1] (f) - 1 d;
0010
skip if result = 0
ffff
Status Affected: Z
The contents of register 'f' are complemented. If 'd' is 0 the result is stored in the W register. If 'd' is 1 the result is stored back in register 'f'.
Status Affected: None
11df The contents of register 'f' are decremented. If 'd' is 0 the result is placed in the W register. If 'd' is 1 the result is placed back in register 'f'. If the result is 0, the next instruction, which is already fetched, is discarded and an NOP is executed instead making it a two cycle instruction.
Words: Cycles: Example:
REG1 REG1 W
1 1
COMF = = = 0x13 0x13 0xEC REG1,0
Before Instruction After Instruction
Words: Cycles: Example:
1 1(2)
DECFSZ GOTO CONTINUE * * * = = = = = address (HERE) CNT - 1; 0, address (CONTINUE); 0, address (HERE+1) HERE CNT, 1 LOOP
DECF Syntax: Operands: Operation: Encoding: Description:
Decrement f [ label ] DECF f,d 0 f 31 d [0,1] (f) - 1 (dest)
0000 11df ffff
Before Instruction
PC CNT if CNT PC if CNT PC
After Instruction
Status Affected: Z
Decrement register 'f'. If 'd' is 0 the result is stored in the W register. If 'd' is 1 the result is stored back in register 'f'.
GOTO Syntax: Operands: Operation:
Unconditional Branch [ label ] GOTO k 0 k 511 k PC<8:0>; STATUS<6:5> PC<10:9>
101k kkkk kkkk
Words: Cycles: Example:
CNT Z CNT Z
1 1
DECF = = = = 0x01 0 0x00 1 CNT,
1
Before Instruction
Status Affected: None Encoding: Description:
GOTO is an unconditional branch. The 9-bit immediate value is loaded into PC bits <8:0>. The upper bits of PC are loaded from STATUS<6:5>. GOTO is a two cycle instruction.
After Instruction
Words: Cycles: Example:
PC =
1 2
GOTO THERE address (THERE)
After Instruction
(c) 1998 Microchip Technology Inc.
Preliminary
DS40197A-page 13
PIC16HV540
INCF Syntax: Operands: Operation: Encoding: Description: Increment f [ label ] 0 f 31 d [0,1] (f) + 1 (dest)
0010 10df ffff
IORLW Syntax: Operands: Operation: Encoding: Description:
Inclusive OR literal with W [ label ] IORLW k 0 k 255 (W) .OR. (k) (W)
1101 kkkk kkkk
INCF f,d
Status Affected: Z
The contents of the W register are OR'ed with the eight bit literal 'k'. The result is placed in the W register.
Status Affected: Z
The contents of register 'f' are incremented. If 'd' is 0 the result is placed in the W register. If 'd' is 1 the result is placed back in register 'f'.
Words: Cycles: Example:
1 1
IORLW = = = 0x9A 0xBF 0 0x35
Words: Cycles: Example:
CNT Z CNT Z
1 1
INCF = = = = CNT,
1
Before Instruction
W W Z
Before Instruction
0xFF 0 0x00 1
After Instruction
After Instruction IORWF Syntax: INCFSZ Syntax: Operands: Operation: Encoding: Description: Increment f, Skip if 0 [ label ] 0 f 31 d [0,1] (f) + 1 (dest), skip if result = 0
0011 11df ffff
Inclusive OR W with f [ label ] 0 f 31 d [0,1] (W).OR. (f) (dest)
0001 00df ffff
IORWF
f,d
Operands: Operation: Encoding: Description:
INCFSZ f,d
Status Affected: Z
Inclusive OR the W register with register 'f'. If 'd' is 0 the result is placed in the W register. If 'd' is 1 the result is placed back in register 'f'.
Status Affected: None
The contents of register 'f' are incremented. If 'd' is 0 the result is placed in the W register. If 'd' is 1 the result is placed back in register 'f'. If the result is 0, then the next instruction, which is already fetched, is discarded and an NOP is executed instead making it a two cycle instruction.
Words: Cycles: Example:
1 1
IORWF 0x13 0x91 0x13 0x93 0 RESULT, 0
Before Instruction
RESULT = W =
Words: Cycles: Example:
1 1(2)
INCFSZ GOTO CONTINUE * * * = = = = = address (HERE) CNT + 1; 0, address (CONTINUE); 0, address (HERE +1) HERE CNT, LOOP 1
After Instruction
RESULT = W = Z =
Before Instruction
PC CNT if CNT PC if CNT PC
After Instruction
DS40197A-page 14
Preliminary
(c) 1998 Microchip Technology Inc.
PIC16HV540
MOVF Syntax: Operands: Operation: Encoding: Description: Move f [ label ] 0 f 31 d [0,1] (f) (dest)
0010 00df ffff
MOVWF MOVF f,d Syntax: Operands: Operation: Encoding: Description: Words: Cycles: Example:
Move W to f [ label ] 0 f 31 (W) (f)
0000 001f ffff
MOVWF
f
Status Affected: None
Move data from the W register to register 'f'.
Status Affected: Z
The contents of register 'f' is moved to destination 'd'. If 'd' is 0, destination is the W register. If 'd' is 1, the destination is file register 'f'. 'd' is 1 is useful to test a file register since status flag Z is affected.
1 1
MOVWF = = = = TEMP_REG 0xFF 0x4F 0x4F 0x4F
Words: Cycles: Example:
W =
1 1
MOVF FSR, 0
Before Instruction
TEMP_REG W
After Instruction
TEMP_REG W
After Instruction
value in FSR register
NOP MOVLW Syntax: Operands: Operation: Encoding: Description: Move Literal to W [ label ] k (W)
1100 kkkk kkkk
No Operation [ label ] None No operation
0000 0000 0000
Syntax: Operands: Operation: Encoding: Description: Words: Cycles: Example:
NOP
MOVLW k
0 k 255
Status Affected: None No operation. 1 1
NOP
Status Affected: None
The eight bit literal 'k' is loaded into the W register. The don't cares will assemble as 0s.
Words: Cycles: Example:
W =
1 1
MOVLW 0x5A 0x5A
After Instruction
(c) 1998 Microchip Technology Inc.
Preliminary
DS40197A-page 15
PIC16HV540
OPTION Syntax: Operands: Operation: Encoding: Description: Words: Cycles: Example
W
Load OPTION Register [ label ] None (W) OPTION OPTION
RLF Syntax: Operands: Operation:
Rotate Left f through Carry [ label ] RLF 0 f 31 d [0,1] See description below
0011 01df ffff
f,d
Status Affected: None
0000 0000 0010 The content of the W register is loaded into the OPTION register.
Status Affected: C Encoding: Description:
The contents of register 'f' are rotated one bit to the left through the Carry Flag. If 'd' is 0 the result is placed in the W register. If 'd' is 1 the result is stored back in register 'f'.
1 1
OPTION
Before Instruction
= 0x07 0x07
C Words: Cycles: Example: 1 1
RLF = = = = =
register 'f'
After Instruction
OPTION =
REG1,0 1110 0110 0 1110 0110 1100 1100 1
RETLW Syntax: Operands: Operation:
Return with Literal in W [ label ] RETLW k 0 k 255 k (W); TOS PC
1000 kkkk kkkk
Before Instruction
REG1 C REG1 W C
After Instruction
Status Affected: None Encoding: Description:
The W register is loaded with the eight bit literal 'k'. The program counter is loaded from the top of the stack (the return address). This is a two cycle instruction.
RRF Syntax: Operands: Operation: Encoding: Description:
Rotate Right f through Carry [ label ] 0 f 31 d [0,1] See description below
0011 00df ffff
RRF f,d
Words: Cycles: Example:
1 2
CALL TABLE ;W contains ;table offset ;value. * ;W now has table * ;value. * ADDWF PC ;W = offset RETLW k1 ;Begin table RETLW k2 ; * * * RETLW kn ; End of table = = 0x07 value of k8
Status Affected: C
The contents of register 'f' are rotated one bit to the right through the Carry Flag. If 'd' is 0 the result is placed in the W register. If 'd' is 1 the result is placed back in register 'f'.
TABLE
C Words: Cycles: Example:
REG1 C REG1 W C
register 'f'
1 1
RRF = = = = = REG1,0 1110 0110 0 1110 0110 0111 0011 0
Before Instruction
W W
Before Instruction
After Instruction
After Instruction
DS40197A-page 16
Preliminary
(c) 1998 Microchip Technology Inc.
PIC16HV540
SLEEP Syntax: Operands: Operation: Enter SLEEP Mode [label] None 00h WDT; 0 WDT prescaler; 1 TO; 0 PD
0000 0000 0011
SUBWF Syntax: Operands: Operation: Encoding: Description:
Subtract W from f [label] SUBWF f,d 0 f 31 d [0,1] (f) - (W) (dest)
0000 10df ffff
SLEEP
Status Affected: C, DC, Z
Subtract (2's complement method) the W register from register 'f'. If 'd' is 0 the result is stored in the W register. If 'd' is 1 the result is stored back in register 'f'.
Status Affected: TO, PD Encoding: Description:
Time-out status bit (TO) is set. The power down status bit (PD) is cleared. The WDT and its prescaler are cleared. The processor is put into SLEEP mode with the oscillator stopped. See section on SLEEP for more details.
Words: Cycles: Example 1:
REG1 W C REG1 W C
1 1
SUBWF = = = = = = 3 2 ? 1 2 1 REG1, 1
Words: Cycles: Example:
1 1 SLEEP
Before Instruction
After Instruction
; result is positive
Example 2: Before Instruction
REG1 W C REG1 W C = = = = = = 2 2 ? 0 2 1
After Instruction
; result is zero
Example 3: Before Instruction
REG1 W C REG1 W C = = = = = = 1 2 ? FF 2 0
After Instruction
; result is negative
(c) 1998 Microchip Technology Inc.
Preliminary
DS40197A-page 17
PIC16HV540
SWAPF Syntax: Operands: Operation: Swap Nibbles in f [ label ] SWAPF f,d 0 f 31 d [0,1] (f<3:0>) (dest<7:4>); (f<7:4>) (dest<3:0>)
0011 10df ffff
XORLW Syntax: Operands: Operation: Encoding: Description:
Exclusive OR literal with W [label] XORLW k 0 k 255 (W) .XOR. k (W)
1111 kkkk kkkk
Status Affected: Z
The contents of the W register are XOR'ed with the eight bit literal 'k'. The result is placed in the W register.
Status Affected: None Encoding: Description:
The upper and lower nibbles of register 'f' are exchanged. If 'd' is 0 the result is placed in W register. If 'd' is 1 the result is placed in register 'f'.
Words: Cycles: Example:
1 1 XORLW
= = 0xB5 0x1A
Words: Cycles: Example
REG1 REG1 W
1 1
SWAPF = = =
0xAF
Before Instruction REG1, 0
W W
Before Instruction
0xA5 0xA5 0X5A
After Instruction
After Instruction XORWF Syntax: Operands: TRIS Syntax: Operands: Operation: Encoding: Description: Words: Cycles: Example
W TRISA
Exclusive OR W with f [ label ] XORWF 0 f 31 d [0,1] (W) .XOR. (f) (dest)
0001 10df ffff
f,d
Load TRIS Register [ label ] TRIS f = 5, 6 or 7 (W) TRIS register f
0000 0000 0fff
f
Operation: Encoding: Description:
Status Affected: Z
Exclusive OR the contents of the W register with register 'f'. If 'd' is 0 the result is stored in the W register. If 'd' is 1 the result is stored back in register 'f'.
Status Affected: None
TRIS register 'f' (f = 5, 6, or 7) is loaded with the contents of the W register
1 1
TRIS = = 0XA5 0XA5 PORTA
Words: Cycles: Example
REG W REG W
1 1 XORWF
= = = = REG,1
Before Instruction After Instruction
Before Instruction
0xAF 0xB5 0x1A 0xB5
After Instruction
DS40197A-page 18
Preliminary
(c) 1998 Microchip Technology Inc.
PIC16HV540
6.0 PIC16HV540 DEVICE VARIETIES
6.3 Quick-Turnaround-Production (QTP) Devices
A variety of frequency ranges and packaging options are available. Depending on application and production requirements, the proper device option can be selected using the information in this section. When placing orders, please use the PIC16HV540 Product Identification System at the back of this data sheet to specify the correct part number. For the PIC16HV540 family of devices, there is one device type, as indicated in the device number: 1. HV, as in PIC16HV540A. Refer to PIC16C5X data sheet (DS30453A) for an explanation of how to access these bits. These devices have EPROM program memory and operate over the standard voltage range of 3.5 to 13 volts.
Microchip offers a QTP Programming Service for factory production orders. This service is made available for users who choose not to program a medium to high quantity of units and whose code patterns have stabilized. The devices are identical to the OTP devices but with all EPROM locations and configuration bit options already programmed by the factory. Certain code and prototype verification procedures apply before production shipments are available. Please contact your Microchip Technology sales office for more details.
6.4
Serialized Quick-Turnaround-Production (SQTP SM) Devices
6.1
UV Erasable Devices
The UV erasable versions, offered in CERDIP packages, are optimal for prototype development and pilot programs UV erasable devices can be programmed for any of the four oscillator configurations. Microchip's PICSTART(R) and PRO MATE(R) programmers both support programming of the PIC16HV540. Third party programmers also are available; refer to the Third Party Guide for a list of sources.
Microchip offers the unique programming service where a few user-defined locations in each device are programmed with different serial numbers. The serial numbers may be random, pseudo-random or sequential. Serial programming allows each device to have a unique number which can serve as an entry code, password or ID number.
6.2
One-Time-Programmable (OTP) Devices
The availability of OTP devices is especially useful for customers expecting frequent code changes and updates. The OTP devices, packaged in plastic packages, permit the user to program them once. In addition to the program memory, the configuration bits must be programmed.
(c) 1998 Microchip Technology Inc.
Preliminary
DS40197A-page 19
PIC16HV540
7.0 ELECTRICAL CHARACTERISTICS - PIC16HV540
Absolute Maximum Ratings
Ambient temperature under bias .............................................................................................................. .-20C to +85C Storage temperature ............................................................................................................................. - 65C to +150C Voltage on VDD with respect to VSS................................................................................................................... 0 to +16V Voltage on MCLR with respect to VSS(2) ........................................................................................................... 0 to +14V Voltage on all other pins with respect to VSS................................................................................... -0.6V to (VDD + 0.6V) Total power dissipation(1)..................................................................................................................................... 800 mW Max. current out of VSS pin................................................................................................................................... 150 mA Max. current into VDD pin...................................................................................................................................... 100 mA Max. current into an input pin (T0CKI only)......................................................................................................................500 A Input clamp current, IIK (VI < 0 or VI > VDD)......................................................................................................................20 mA Output clamp current, IOK (V0 < 0 or V0 > VDD)...............................................................................................................20 mA Max. output current sunk by any I/O pin................................................................................................................. 25 mA Max. output current sourced by any I/O pin............................................................................................................ 10 mA Max. output current sourced by a single I/O port (PORTA or B)............................................................................. 40 mA Max. output current sunk by a single I/O port (PORTA or B).................................................................................. 50 mA Note 1: Power dissipation is calculated as follows: Pdis = VDD x {IDD - IOH} + {(VDD-VOH) x IOH} + (VOL x IOL) Note 2: Voltage spikes below VSS at the MCLR pin, inducing currents greater than 80mA, may cause latch-up. Thus, a series resistor of 50-100 should be used when applying a "low" level to the MCLR pin rather than pulling this pin directly to VSS
NOTICE: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
DS40197A-page 20
Preliminary
(c) 1998 Microchip Technology Inc.
PIC16HV540
7.1 DC Characteristics: PIC16HV540-04, 20 (Commercial) PIC16HV540-04I, 20I (Industrial)
DC Characteristics Power Supply Pins Characteristic Supply Voltage HS, XT, RC and LP options RAM Data Retention Voltage(2) VDD start voltage to ensure Power-On Reset VDD rise rate to ensure Power-On Reset Supply Current(3) HS, XT and RC(4) options LP option, Commercial Power Down Current(5)(6) Commercial Industrial Brown-Out Detector Threshold Brown-Out Detector Threshold V V Sym VDD 3.5 VDR VPOR SVDD IDD 0.5 11 IPD 4 0.25 5 0.3 3.1 2.2 12 4.0 14 5.0 A A A A V V VDD = 15V, sleep timer enabled VDD = 15V, sleep timer disabled VDD = 15V, sleep timer enabled VDD = 15V, sleep timer disabled 5V Core 3V Core 27 mA A FOSC = 4.0 MHz, VDD = 15V FOSC = 32 kHz, VDD = 15V, WDT disabled 0.05 VDD 1.5* VSS 15 V V V Device in SLEEP mode See section on Power-On Reset for details Standard Operating Conditions (unless otherwise specified) Operating Temperature 0C TA +70C (commercial) -40C TA +85C (industrial) Min Typ(1) Max Units Conditions
V/ms See section on Power-On Reset for details
* These parameters are characterized but not tested. Note 1: Data in the Typical ("Typ") column is based on characterization results at 25C. This data is for design guidance only and is not tested. 2: This is the limit to which VDD can be lowered in SLEEP mode without losing RAM data. 3: The supply current is mainly a function of the operating voltage and frequency. Other factors such as bus loading, oscillator type, bus rate, internal code execution pattern, and temperature also have an impact on the current consumption. a) The test conditions for all IDD measurements in active operation mode are: OSC1 = external square wave, from rail-to-rail; all I/O pins tristated, pulled to Vss, T0CKI = VDD, MCLR = VDD; WDT enabled/disabled as specified. b) For standby current measurements, the conditions are the same, except that the device is in SLEEP mode. 4: Does not include current through Rext. The current through the resistor can be estimated by the formula: IR = VDD/2Rext (mA) with Rext in k. 5: The power down current in SLEEP mode does not depend on the oscillator type. Power down current is measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD or VSS. 6: The oscillator start-up time can be as much as 8 seconds for XT and LP oscillator selection, if the SLEEP mode is exited or during initial power-up.
(c) 1998 Microchip Technology Inc.
Preliminary
DS40197A-page 21
PIC16HV540
7.2 DC Characteristics: PIC16HV540-04, 20 (Commercial) PIC16HV540-04I, 20I (Industrial)
DC Characteristics All Pins Except Power Supply Pins Characteristic Input Low Voltage I/O Ports PORTA MCLR (Schmitt Trigger) T0CKI (Schmitt Trigger) OSC1 (Schmitt Trigger) OSC1 I/O Ports PORTB Input High Voltage I/O Ports PORTA MCLR (Schmitt Trigger) T0CKI (Schmitt Trigger) OSC1 (Schmitt Trigger) OSC1 I/O Ports PORTB Hysteresis of Schmitt Trigger inputs Sym VIL VSS VSS VSS VSS VSS VSS VIH 0.25 VIO+0.8V 0.85 VIO 0.85 VIO 0.85 VIO 0.7 VIO TBD VHYS 0.15 VIO* VIO VDD VDD VDD VIO TBD V V V V V V V For all VIO(5) RC option only(4) XT and LP options HS, XT and LP options 0.15 VIO 0.15 VIO 0.15 VIO 0.15 VIO 0.3 VIO TBD V V V V V V Pin at hi-impedance RC option only(4) HS, XT and LP options Standard Operating Conditions (unless otherwise specified) Operating Temperature 0C TA +70C (commercial) -40C TA +85C (industrial) Min Typ(1) Max Units Conditions
Input Leakage Current(3) IIL I/O Ports MCLR T0CKI OSC1 RB7 Output Low Voltage I/O Ports PORTA OSC2/CLKOUT VOL
-1.0 -5.0 -3.0 -3.0
0.5
+1.0 +5.0 +3.0 +3.0
A A A A A
0.5 0.5 0.5 TBD
VSS VPIN VDD, Pin at hi-impedance VPIN = VSS +0.25V(2) VPIN = VDD(2) VSS VPIN VDD VSS VPIN VDD, HS, XT and LP options Sleep mode, WPC enabled VDD = 15V, VIO = 5V, IOL = 8.7 mA VDD = 15V, VIO = 5V, IOL = 5 mA VDD = 15V, VIO = 5V, IOL = 2.8 mA VDD = 15V, VIO = 5V, IOL = 1.5 mA RC option only VDD = 15V, IOL = 8.7 mA, VIO = 5V VDD = 15V, VIO = 3V, IOH = -2 mA VDD = 15V, VIO = 5V, IOH = -5.4 mA VDD = 15V, VIO = 3V, IOH =-0.5 mA VDD = 15V, VIO = 5V, IOH = -1.0 mA RC option only VDD = 15V, IOH = -8 mA, VIO = 5V Slowly rising input detect level
0.6 0.6
V V
I/O ports
PORT B VOH VIO-0.7 VIO-0.7
0.6
V V V
Output High Voltage I/O Ports(3) PORTA OSC2/CLKOUT
I/O Ports
PORTB VLEV
VDD-0.7 TBD VDD-1.0 TBD
V V
Threshold Voltage I/O Ports PORTB [7]
* These parameters are characterized but not tested. Note 1: Data in the Typical ("Typ") column is based on characterization results at 25C. This data is for design guidance only and is not tested. 2: The leakage current on the MCLR/VPP pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltage. 3: Negative current is defined as coming out of the pin. 4: For the RC option, the OSC1/CLKIN pin is a Schmitt Trigger input. It is not recommended that the PIC16HV540 be driven with external clock in RC mode. 5: The user may use the better of the two specifications.
DS40197A-page 22
Preliminary
(c) 1998 Microchip Technology Inc.
PIC16HV540
7.3 Timing Parameter Symbology and Load Conditions
The timing parameter symbols have been created following one of the following formats: 1. TppS2ppS 2. TppS T F Frequency Lowercase subscripts (pp) and their meanings: pp 2 to ck CLKOUT cy cycle time drt device reset timer io I/O port Uppercase letters and their meanings: S F Fall H High I Invalid (Hi-impedance) L Low
T
Time
mc osc os t0 wdt
MCLR oscillator OSC1 T0CKI watchdog timer
P R V Z
Period Rise Valid Hi-impedance
FIGURE 7-1:
LOAD CONDITIONS - PIC16HV540
Pin CL VSS
CL = 50 pF for all pins except OSC2 15 pF for OSC2 in XT, HS or LP options when external clock is used to drive OSC1
(c) 1998 Microchip Technology Inc.
Preliminary
DS40197A-page 23
PIC16HV540
7.4 Timing Diagrams and Specifications EXTERNAL CLOCK TIMING - PIC16HV540
Q4 OSC1 1 2 CLKOUT 3 3 4 4 Q1 Q2 Q3 Q4 Q1
FIGURE 7-2:
TABLE 7-1:
EXTERNAL CLOCK TIMING REQUIREMENTS - PIC16HV540
Standard Operating Conditions (unless otherwise specified) Operating Temperature 0C TA +70C (commercial), -40C TA +85C (industrial)
Characteristic External CLKIN Frequency(2) Min DC DC DC DC Oscillator Frequency(2) DC 0.1 0.1 5 External CLKIN Period(2) Typ(1) -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 4/FOSC -- -- -- -- -- -- Max 4.0 20 4.0 200 4.0 20 4.0 200 -- -- -- -- -- 10,000 10,000 200 -- -- -- -- 25* 25* 50* Units MHz MHz MHz kHz MHz MHz MHz kHz ns ns ns s ns ns ns s -- ns ns s ns ns ns HS osc mode XT oscillator LP oscillator HS osc mode XT oscillator LP oscillator Conditions RC osc mode HS osc mode XT osc mode LP osc mode RC osc mode HS osc mode XT osc mode LP osc mode RC osc mode HS osc mode XT osc mode LP osc mode RC osc mode HS osc mode XT osc mode LP osc mode
AC Characteristics
Parameter No.
Sym FOSC
1
TOSC
250 250 250 5.0
Oscillator Period(2)
250 250 250 5.0
2 3
TCY
Instruction Cycle Time(3)
-- 50 50* 2.0*
TosL, TosH Clock in (OSC1) Low or High Time
4
TosR, TosF Clock in (OSC1) Rise or Fall Time
-- -- --
* These parameters are characterized but not tested. Note 1: Data in the Typical ("Typ") column is at VIO = 5V, VDD = 9V, 25C unless otherwise stated. These parameters are for design guidance only and are not tested. 2: All specified values are based on characterization data for that particular oscillator type under standard operating conditions with the device executing code. Exceeding these specified limits may result in an unstable oscillator operation and/or higher than expected current consumption. When an external clock input is used, the "max" cycle time limit "DC" (no clock) for all devices. 3: Instruction cycle period (TCY) equals four times the input oscillator time base period.
DS40197A-page 24
Preliminary
(c) 1998 Microchip Technology Inc.
PIC16HV540
FIGURE 7-3: CLKOUT AND I/O TIMING - PIC16HV540
Q4 OSC1 10 CLKOUT 13 I/O Pin (input) 17 I/O Pin (output) Old Value 15 New Value 18 12 16 11 Q1 Q2 Q3
14
19
20, 21 Note: All tests must be done with specified capacitive loads 50 pF on I/O pins and CLKOUT.
TABLE 7-2:
CLKOUT AND I/O TIMING REQUIREMENTS - PIC16HV540
Standard Operating Conditions (unless otherwise specified) Operating Temperature 0C TA +70C (commercial), -40C TA +85C (industrial).
Characteristic OSC1 to CLKOUT(2) OSC1 to CLKOUT(2) CLKOUT rise time(2) CLKOUT fall time(2) CLKOUT to Port out valid(2) Port in valid before CLKOUT(2) Port in hold after CLKOUT(2) OSC1 (Q1 cycle) to Port out valid(3) OSC1 (Q2 cycle) to Port input invalid (I/O in hold time) Port input valid to OSC1 (I/O in setup time) Port output rise time(3) Port output fall time(3) Min -- -- -- -- -- 0.25 TCY+30* 0* -- TBD TBD -- -- Typ(1) 15 15 5.0 5.0 -- -- -- -- -- -- 10 10 Max 30** 30** 15** 15** 40** -- -- 100* -- -- 25** 25** Units ns ns ns ns ns ns ns ns ns ns ns ns
AC Characteristics
Parameter No. 10 11 12 13 14 15 16 17 18 19 20 21
Sym TosH2ckL TosH2ckH TckR TckF TckL2ioV TioV2ckH TckH2ioI TosH2ioV TosH2ioI TioV2osH TioR TioF
* These parameters are characterized but not tested. ** These parameters are design targets and are not tested. No characterization data available at this time. Note 1: Data in the Typical ("Typ") column is at VIO = 5V, VDD = 9V, 25C unless otherwise stated. These parameters are for design guidance only and are not tested. 2: Measurements are taken in RC Mode where CLKOUT output is 4 x TOSC. 3: See Figure 7-1 for loading conditions.
(c) 1998 Microchip Technology Inc.
Preliminary
DS40197A-page 25
PIC16HV540
FIGURE 7-4: RESET, WATCHDOG TIMER, AND DEVICE RESET TIMER TIMING - PIC16HV540
VDD MCLR 30 Internal POR 32 DRT Time-out Internal RESET Watchdog Timer RESET 31 34 I/O pin (Note 1) 34
32
32
Note 1: I/O pins must be taken out of hi-impedance mode by enabling the output drivers in software.
TABLE 7-3:
RESET, WATCHDOG TIMER, AND DEVICE RESET TIMER - PIC16HV540
AC Characteristics Standard Operating Conditions (unless otherwise specified) Operating Temperature 0C TA +70C (commercial) -40C TA +85C (industrial) Parameter No.
30 31 32
Sym TmcL Twdt TDRT TioZ Tpc
Characteristic MCLR Pulse Width (low) Watchdog Timer Time-out Period Device Reset Timer Period I/O Hi-impedance from MCLR Low Pin Change Pulse Width
Min -- 9.0* 9.0* 0.55* -- --
Typ(1) 2 18* 18* 1.1* -- 2
Max -- 40* 30* 2.5 100* --
Units s ms ms ns s
Conditions VDD = 15V, VIO = 5V VDD = 15V, VIO = 5V VDD = 15V, VIO = 5V, RC mode
34 --
* These parameters are characterized but not tested. Note 1: Data in the Typical ("Typ") column is at VIO = 5V, VDD = 9V, 25C unless otherwise stated. These parameters are for design guidance only and are not tested.
DS40197A-page 26
Preliminary
(c) 1998 Microchip Technology Inc.
PIC16HV540
FIGURE 7-5: TIMER0 CLOCK TIMINGS - PIC16HV540
T0CKI 40 41
42
TABLE 7-4:
TIMER0 CLOCK REQUIREMENTS - PIC16HV540
Standard Operating Conditions (unless otherwise specified) Operating Temperature 0C TA +70C (commercial) -40C TA +85C (industrial) Min
0.5 TCY + 20* 10* 0.5 TCY + 20* 10* 20 or TCY + 40* N
AC Characteristics
Parameter Sym Characteristic No.
40 Tt0H T0CKI High Pulse Width - No Prescaler - With Prescaler 41 Tt0L T0CKI Low Pulse Width - No Prescaler - With Prescaler 42 Tt0P T0CKI Period
Typ(1) Max Units Conditions
-- -- -- -- -- -- -- -- -- -- ns ns ns ns ns Whichever is greater. N = Prescale Value (1, 2, 4,..., 256)
* These parameters are characterized but not tested. Note 1: Data in the Typical ("Typ") column is at 3.8V, 25C unless otherwise stated. These parameters are for design guidance only and are not tested.
(c) 1998 Microchip Technology Inc.
Preliminary
DS40197A-page 27
PIC16HV540
8.0 DC AND AC CHARACTERISTICS PIC16HV540
The graphs and tables provided in this section are for design guidance and are not tested or guaranteed. In some graphs or tables the data presented are outside specified operating range (e.g., outside specified VDD range). This is for information only and devices will operate properly only within the specified range. The data presented in this section is a statistical summary of data collected on units from different lots over a period of time. "Typical" represents the mean of the distribution while "max" or "min" represents (mean + 3) and (mean - 3) respectively, where is standard deviation. Not available at this time.
DS40197A-page 28
Preliminary
(c) 1998 Microchip Technology Inc.
PIC16HV540
9.0 PACKAGING INFORMATION
K04-007 18-Lead Plastic Dual In-line (P) - 300 mil
E
Package Type:
D
2 n E1 A1 A R c A2 B1 eB Units Dimension Limits PCB Row Spacing Number of Pins Pitch Lower Lead Width Upper Lead Width Shoulder Radius Lead Thickness Top to Seating Plane Top of Lead to Seating Plane Base to Seating Plane Tip to Seating Plane Package Length Molded Package Width Radius to Radius Width Overall Row Spacing Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter.
1
L
B
p
MIN n p B B1 R c A A1 A2 L D E E1 eB
INCHES* NOM 0.300 18 0.100 0.013 0.018 0.055 0.060 0.000 0.005 0.005 0.010 0.110 0.155 0.075 0.095 0.000 0.020 0.125 0.130 0.890 0.895 0.245 0.255 0.230 0.250 0.310 0.349 5 10 5 10
MAX
MIN
0.023 0.065 0.010 0.015 0.155 0.115 0.020 0.135 0.900 0.265 0.270 0.387 15 15
MILLIMETERS NOM MAX 7.62 18 2.54 0.33 0.46 0.58 1.40 1.52 1.65 0.00 0.13 0.25 0.13 0.25 0.38 2.79 3.94 3.94 1.91 2.41 2.92 0.00 0.51 0.51 3.18 3.30 3.43 22.61 22.73 22.86 6.22 6.48 6.73 5.84 6.35 6.86 7.87 8.85 9.83 5 10 15 5 10 15
Dimension "B1" does not include dam-bar protrusions. Dam-bar protrusions shall not exceed 0.003" (0.076 mm) per side or 0.006" (0.152 mm) more than dimension "B1." Dimensions "D" and "E" do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010" (0.254 mm) per side or 0.020" (0.508 mm) more than dimensions "D" or "E."
(c) 1998 Microchip Technology Inc.
Preliminary
DS40197A-page 29
PIC16HV540
Package Type: K04-051 18-Lead Plastic Small Outline (SO) - Wide, 300 mil
E1 p E
D
2 B n X 45 1
L R2
c A R1 Units Dimension Limits Pitch Number of Pins Overall Pack. Height Shoulder Height Standoff Molded Package Length Molded Package Width Outside Dimension Chamfer Distance Shoulder Radius Gull Wing Radius Foot Length Foot Angle Radius Centerline Lead Thickness Lower Lead Width Mold Draft Angle Top Mold Draft Angle Bottom
*
A1
L1
A2 MILLIMETERS NOM MAX 1.27 18 2.50 2.36 2.64 1.47 1.22 1.73 0.19 0.10 0.28 11.58 11.43 11.73 7.51 7.42 7.59 10.33 10.01 10.64 0.50 0.25 0.74 0.13 0.13 0.25 0.13 0.13 0.25 0.41 0.28 0.53 0 4 8 0.38 0.25 0.51 0.27 0.23 0.30 0.42 0.36 0.48 0 12 15 0 12 15
MIN p n A A1 A2 D E E1 X R1 R2 L L1 c B
INCHES* NOM 0.050 18 0.099 0.093 0.058 0.048 0.008 0.004 0.456 0.450 0.296 0.292 0.407 0.394 0.020 0.010 0.005 0.005 0.005 0.005 0.011 0.016 0 4 0.010 0.015 0.009 0.011 0.014 0.017 0 12 0 12
MAX
MIN
0.104 0.068 0.011 0.462 0.299 0.419 0.029 0.010 0.010 0.021 8 0.020 0.012 0.019 15 15
Controlling Parameter. Dimension "B" does not include dam-bar protrusions. Dam-bar protrusions shall not exceed 0.003" (0.076 mm) per side or 0.006" (0.152 mm) more than dimension "B." Dimensions "D" and "E" do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010" (0.254 mm) per side or 0.020" (0.508 mm) more than dimensions "D" or "E."
DS40197A-page 30
Preliminary
(c) 1998 Microchip Technology Inc.
PIC16HV540
Package Type: K04-010 18-Lead Ceramic Dual In-line with Window (JW) - 300 mil
E
W2
D
2 n W1 E1 1
A R eB
A1 L
c A2 B1 B p
Units Dimension Limits PCB Row Spacing Number of Pins Pitch Lower Lead Width Upper Lead Width Shoulder Radius Lead Thickness Top to Seating Plane Top of Lead to Seating Plane Base to Seating Plane Tip to Seating Plane Package Length Package Width Radius to Radius Width Overall Row Spacing Window Width Window Length * Controlling Parameter.
MIN n p B B1 R c A A1 A2 L D E E1 eB W1 W2
0.098 0.016 0.050 0.010 0.008 0.175 0.091 0.015 0.125 0.880 0.285 0.255 0.345 0.130 0.190
INCHES* NOM 0.300 18 0.100 0.019 0.055 0.013 0.010 0.183 0.111 0.023 0.138 0.900 0.298 0.270 0.385 0.140 0.200
MAX
MIN
0.102 0.021 0.060 0.015 0.012 0.190 0.131 0.030 0.150 0.920 0.310 0.285 0.425 0.150 0.210
MILLIMETERS NOM MAX 7.62 18 2.54 2.49 2.59 0.41 0.47 0.53 1.40 1.27 1.52 0.32 0.25 0.38 0.25 0.20 0.30 4.64 4.83 4.45 2.82 2.31 3.33 0.00 0.57 0.76 3.18 3.49 3.81 22.35 22.86 23.37 7.24 7.56 7.87 6.48 6.86 7.24 8.76 9.78 10.80 0.13 0.15 0.14 0.19 0.21 0.2
(c) 1998 Microchip Technology Inc.
Preliminary
DS40197A-page 31
PIC16HV540
Package Type: K04-072 20-Lead Plastic Shrink Small Outine (SS) - 5.30 mm
E1 E p
D
B n
2 1 L R2
c
A A1 R1 L1 A2
Units Dimension Limits Pitch Number of Pins Overall Pack. Height Shoulder Height Standoff Molded Package Length Molded Package Width Outside Dimension Shoulder Radius Gull Wing Radius Foot Length Foot Angle Radius Centerline Lead Thickness Lower Lead Width Mold Draft Angle Top Mold Draft Angle Bottom
*
MIN p n A A1 A2 D E E1 R1 R2 L L1 c B
INCHES NOM 0.026 20 0.068 0.073 0.026 0.036 0.002 0.005 0.278 0.283 0.205 0.208 0.301 0.306 0.005 0.005 0.005 0.005 0.015 0.020 4 0 0.000 0.005 0.005 0.007 0.010 0.012 0 5 0 5
MAX
MIN
0.078 0.046 0.008 0.289 0.212 0.311 0.010 0.010 0.025 8 0.010 0.009 0.015 10 10
MILLIMETERS* NOM MAX 0.65 20 1.99 1.86 1.73 1.17 0.91 0.66 0.21 0.13 0.05 7.33 7.20 7.07 5.38 5.29 5.20 7.78 7.90 7.65 0.13 0.25 0.13 0.25 0.13 0.13 0.64 0.38 0.51 0 4 8 0.25 0.00 0.13 0.22 0.13 0.18 0.38 0.25 0.32 0 5 10 0 5 10
Controlling Parameter. Dimension "B" does not include dam-bar protrusions. Dam-bar protrusions shall not exceed 0.003" (0.076 mm) per side or 0.006" (0.152 mm) more than dimension "B." Dimensions "D" and "E" do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010" (0.254 mm) per side or 0.020" (0.508 mm) more than dimensions "D" or "E."
DS40197A-page 32
Preliminary
(c) 1998 Microchip Technology Inc.
PIC16HV540
9.1 Package Marking Information 18-Lead PDIP MMMMMMMMMMMMMMMMM MMMMMMMMMMMMMMMMM AABBCDE Example PIC16HV540 04I/P456 9823CBA
18-Lead SOIC MMMMMMMMMMMM MMMMMMMMMMMM MMMMMMMMMMMM AABBCDE
Example PIC16HV540 04I/S0218 9818CDK
18-Lead CERDIP Windowed MMMMMMMM MMMMMMMM AABBCDE
Example PIC16HV5 40MMMMMM 9801CBA
20-Lead SSOP MMMMMMMMMMM MMMMMMMMMMM AABBCDE
Example PIC16HV540 04I/218 9820CBP
Legend: MM...M XX...X AA BB C
D E Note:
Microchip part number information Customer specific information* Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Facility code of the plant at which wafer is manufactured O = Outside Vendor C = 5" Line S = 6" Line H = 8" Line Mask revision number Assembly code of the plant or country of origin in which part was assembled
In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information.
*
Standard OTP marking consists of Microchip part number, year code, week code, facility code, mask rev#, and assembly code. For OTP marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price.
(c) 1998 Microchip Technology Inc.
Preliminary
DS40197A-page 33
PIC16HV540
ON-LINE SUPPORT
Microchip provides on-line support on the Microchip World Wide Web (WWW) site. The web site is used by Microchip as a means to make files and information easily available to customers. To view the site, the user must have access to the Internet and a web browser, such as Netscape or Microsoft Explorer. Files are also available for FTP download from our FTP site.
Systems Information and Upgrade Hot Line
The Systems Information and Upgrade Line provides system users a listing of the latest versions of all of Microchip's development systems software products. Plus, this line provides information on how customers can receive any currently available upgrade kits.The Hot Line Numbers are: 1-800-755-2345 for U.S. and most of Canada, and 1-602-786-7302 for the rest of the world.
Connecting to the Microchip Internet Web Site
The Microchip web site is available by using your favorite Internet browser to attach to: www.microchip.com The file transfer site is available by using an FTP service to connect to: ftp://ftp.futureone.com/pub/microchip The web site and file transfer site provide a variety of services. Users may download files for the latest Development Tools, Data Sheets, Application Notes, User's Guides, Articles and Sample Programs. A variety of Microchip specific business information is also available, including listings of Microchip sales offices, distributors and factory representatives. Other data available for consideration is: * Latest Microchip Press Releases * Technical Support Section with Frequently Asked Questions * Design Tips * Device Errata * Job Postings * Microchip Consultant Program Member Listing * Links to other useful web sites related to Microchip Products * Conferences for products, Development Systems, technical information and more * Listing of seminars and events
Trademarks: The Microchip name, logo, PIC, PICSTART, MPLAB, PICmicro and PRO MATE are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip in the U.S.A. All other trademarks mentioned herein are the property of their respective companies.
DS40197A-page 34
Preliminary
(c) 1998 Microchip Technology Inc.
PIC16HV540
PIC16HV540 Product Identification System
To order or to obtain information, e.g., on pricing or delivery, please use the listed part numbers, and refer to the factory or the listed sales offices. PIC16HV540 -XX X /XX XXX Pattern: Package: 3-Digit Pattern Code for QTP (blank otherwise) P SO SS JW I 04 20 = = = = PDIP SOIC (Gull Wing, 300 mil body) SSOP (209 mil) Windowed CERDIP
Examples: a) PIC16HV540 - 04/P 301 = Commercial temp., PDIP package, 4 MHz, QTP pattern #301 b) PIC16HV540 - 04I/SO = Industrial temp., SOIC package, 4 MHz
Temperature Range: Frequency Range: Device:
= 0C to +70C = -40C to +85C = 4 MHz (XT, RC and LP oscs) = 20 MHz (HS osc)
PIC16HV540: V PICHV540: (Tape and Reel)
Sales and Support
Products supported by a preliminary Data Sheet may possibly have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1.Your local Microchip sales office (see below) 2.The Microchip Corporate Literature Center U.S. FAX: (602) 786-7277
3.The Microchip Worldwide Web Site at www.microchip.com
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. For latest version information and upgrade kits for Microchip Development Tools, please call 1-800-755-2345 or 1-602-786-7302.
(c) 1998 Microchip Technology Inc.
Preliminary
DS40197A-page 35
M
WORLDWIDE SALES AND SERVICE
AMERICAS
Corporate Office
Microchip Technology Inc. 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 602-786-7200 Fax: 602-786-7277 Technical Support: 602 786-7627 Web: http://www.microchip.com
AMERICAS (continued)
Toronto
Microchip Technology Inc. 5925 Airport Road, Suite 200 Mississauga, Ontario L4V 1W1, Canada Tel: 905-405-6279 Fax: 905-405-6253
ASIA/PACIFIC (continued)
Singapore
Microchip Technology Singapore Pte Ltd. 200 Middle Road #07-02 Prime Centre Singapore 188980 Tel: 65-334-8870 Fax: 65-334-8850
ASIA/PACIFIC
Hong Kong
Microchip Asia Pacific RM 3801B, Tower Two Metroplaza 223 Hing Fong Road Kwai Fong, N.T., Hong Kong Tel: 852-2-401-1200 Fax: 852-2-401-3431
Taiwan, R.O.C
Microchip Technology Taiwan 10F-1C 207 Tung Hua North Road Taipei, Taiwan, ROC Tel: 886-2-2717-7175 Fax: 886-2-2545-0139
Atlanta
Microchip Technology Inc. 500 Sugar Mill Road, Suite 200B Atlanta, GA 30350 Tel: 770-640-0034 Fax: 770-640-0307
Boston
Microchip Technology Inc. 5 Mount Royal Avenue Marlborough, MA 01752 Tel: 508-480-9990 Fax: 508-480-8575
EUROPE
United Kingdom
Arizona Microchip Technology Ltd. 505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44-1189-21-5858 Fax: 44-1189-21-5835
India
Microchip Technology Inc. India Liaison Office No. 6, Legacy, Convent Road Bangalore 560 025, India Tel: 91-80-229-0061 Fax: 91-80-229-0062
Chicago
Microchip Technology Inc. 333 Pierce Road, Suite 180 Itasca, IL 60143 Tel: 630-285-0071 Fax: 630-285-0075
Japan
Microchip Technology Intl. Inc. Benex S-1 6F 3-18-20, Shinyokohama Kohoku-Ku, Yokohama-shi Kanagawa 222-0033 Japan Tel: 81-45-471- 6166 Fax: 81-45-471-6122
France
Arizona Microchip Technology SARL Zone Industrielle de la Bonde 2 Rue du Buisson aux Fraises 91300 Massy, France Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79
Dallas
Microchip Technology Inc. 14651 Dallas Parkway, Suite 816 Dallas, TX 75240-8809 Tel: 972-991-7177 Fax: 972-991-8588
Dayton
Microchip Technology Inc. Two Prestige Place, Suite 150 Miamisburg, OH 45342 Tel: 937-291-1654 Fax: 937-291-9175
Korea
Microchip Technology Korea 168-1, Youngbo Bldg. 3 Floor Samsung-Dong, Kangnam-Ku Seoul, Korea Tel: 82-2-554-7200 Fax: 82-2-558-5934
Germany
Arizona Microchip Technology GmbH Gustav-Heinemann-Ring 125 D-81739 Muchen, Germany Tel: 49-89-627-144 0 Fax: 49-89-627-144-44
Detroit
Microchip Technology Inc. 42705 Grand River, Suite 201 Novi, MI 48375-1727 Tel: 248-374-1888 Fax: 248-374-2874
Italy
Arizona Microchip Technology SRL Centro Direzionale Colleoni Palazzo Taurus 1 V. Le Colleoni 1 20041 Agrate Brianza Milan, Italy Tel: 39-39-6899939 Fax: 39-39-6899883 9/8/98
Shanghai
Microchip Technology RM 406 Shanghai Golden Bridge Bldg. 2077 Yan'an Road West, Hong Qiao District Shanghai, PRC 200335 Tel: 86-21-6275-5700 Fax: 86 21-6275-5060
Los Angeles
Microchip Technology Inc. 18201 Von Karman, Suite 1090 Irvine, CA 92612 Tel: 714-263-1888 Fax: 714-263-1338
New York
Microchip Technology Inc. 150 Motor Parkway, Suite 202 Hauppauge, NY 11788 Tel: 516-273-5305 Fax: 516-273-5335
San Jose
Microchip Technology Inc. 2107 North First Street, Suite 590 San Jose, CA 95131 Tel: 408-436-7950 Fax: 408-436-7955
Microchip received ISO 9001 Quality System certification for its worldwide headquarters, design, and wafer fabrication facilities in January, 1997. Our field-programmable PICmicro(R) 8-bit MCUs, Serial EEPROMs, related specialty memory products and development systems conform to the stringent quality standards of the International Standard Organization (ISO).
All rights reserved. (c) 1998 Microchip Technology Incorporated. Printed in the USA. 10/98
Printed on recycled paper.
Information contained in this publication regarding device applications and the like is intended for suggestion only and may be superseded by updates. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip's products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. The Microchip logo and name are registered trademarks of Microchip Technology Inc. in the U.S.A. and other countries. All rights reserved. All other trademarks mentioned herein are the property of their respective companies.
DS40197A-page 36
(c) 1998 Microchip Technology Inc.

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